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With Windows 8.1 Enterprise/Professional 64bit or 32 bit, a free update designed to address some of its users’ concerns and enable a faster pace of Windows releases, Microsoft tries to bridge the gap between old and new, between mouse and touchscreen. The new OS looks and feels mostly the same, but its many small tweaks make for a significant update — and hint at the future of Microsofts vision for its own computing platform. Microsoft is completely invested in Windows 8, and it’s been busy over the last twelve months, but making Windows 8.1 into something easier and more familiar is no small task. Microsoft’s chance to usher in the touch-friendly, tablet-filled future it imagines — take two.


UI changes
When you first switch on a Windows 8.1 PC you wont notice many differences from Windows 8. The boot process is still quick, Live Tiles still greet you after you sign in. However, as you start to navigate around, subtle improvements become apparent. First-time users will see tips for navigating between apps or around the OS after the initial demo during setup, in a similar way to how Windows 95 greeted new users. Theyre useful as initial hints, and a new dedicated Help + Tips application serves as the central point for anyone left confused by the new user interface.


Start button and Snap Views
The first time you launch the desktop in 8.1, you’ll see the return of the ultra-familiar Start Button. It acts as a portal to switch between the desktop and Start Screen worlds, and it will only show on the Start Screen if you use a mouse to navigate to the lower left-hand corner. It replaces Microsofts odd looking square tip from Windows 8, and for many will act as a familiar reminder of how to navigate Windows. But it’s just a button: Microsoft is not bringing back the traditional Windows Start Menu here.

Windows 8.1 allows for a lot more personalization across the board. You can now pick from built-in backgrounds that move and animate as you swipe, but theres also the ability to change the color scheme with a color picker thats a lot more flexible than Windows 8 ever was. But the real star of the show is the ability to set the desktop wallpaper as the backdrop for the Start Screen. It sounds simple, but its an effective way to bridge the otherwise jarring switch from desktop to Start Screen.


INSTALLATION Through USB Flash Drive:

1. Download and Install Windows 7 USB DVD Download Tool Program by CLICKING HERE

2. Start the Windows 7 USB DVD Download Tool program. You should be able to find the shortcut on the Desktop, as well as in your Start menu or on your Start screen, depending on which version of Windows you installed the program on.

3. Click Browse on the Step 1 of 4: Choose ISO file screen. Then click Next
4. Choose USB device on the Step 2 of 4: Choose media type screen.
5. On the Step 3 of 4: Insert USB device screen, choose from the drop-down box the flash drive or USB-connected external hard drive you want to put the Windows 8 setup files onto and then touch or click Begin copying.
6. On Step 4 of 4: Creating bootable USB device, just wait for the Windows 7 USB DVD Download Tool to prepare the drive and copy the Windows 8 installation files to it.

The first Status you see will be Formatting, which will take anywhere from a few to several seconds, depending on how large the USB drive is that youre using. Next will be Copying files which could take anywhere from 15 to 30 minutes, possibly longer, depending on which Windows 8.1 ISO file youre working from, as well as on how fast your flash drive, USB connection, and computer is.

7. Assuming everything went as planned, the next screen should say Bootable USB device created successfully with a Status that says Backup completed.

You can now close the Windows 7 USB DVD Download Tool program window. The flash drive, or other external USB drive youre using, now has the necessary files on it to install Windows 8.1 and is also properly configured to be booted from.

8. Boot from the USB device that you just created to start the Windows 8.1 install process.

The proposed sinewave inverter UPS circuit is built using PIC16F72 microcontroller, some passive electronic components and associated power devices.

Data provided by: Mr. hisham bahaa-aldeen (hisham2630@gmail.com)


Sinewave UPS Circuit using PIC16F72 Part-2
 
Sinewave UPS Circuit using PIC16F72 Part-3
 
Sinewave UPS Circuit using PIC16F72 Part-4


Main Features:

The main technical features of the discussed PIC16F72 sinewave inverter may be evaluated from the following data:

Power output (625/800va) fully customization and can be upgraded to other desired levels.
Battery 12V/200AH
Inverter Output Volt : 230v (+2%)
Inverter Output Frequency : 50Hz
Inverter Output Waveform : PWM Modulated Sinewave
Harmonic Distortion : less  than 3%
Crest Factor : less than 4:1
Inverter efficiency : 90% For 24v System, around 85% with 12v System
Audible Noise : less 60db At 1-meter


Inverter Protection Features

Low-battery Shut-down
Overload Shut-down
Output Short Circuit Shut-down


Low-battery Detection and Shutdown Feature

Beep Start initiated at 10.5v (beep At Every 3-sec)
Inverter Shut-down at around 10v (5 pulses of beep in every 2-sec)
Over Load : Beep Initiated at 120% Load (beep at the rate of 2-sec)
Inverter Shut-down at 130% Overload (5 pulses of beep in every 2-sec)


LED Indicators are provided for the following:
Inverter On
Low-battery - Flashing in Low battery mode with Alarm
Solid ON During Cut-OFF
Over Load - Flashing at Overload cut-off with Alarm
Solid ON During Cut-OFF
Charging mode - Flashing at Charging mode
Solid ON During Absorption
Mains Indication - LED On


Circuit Specifications

8-bit Microcontroller Based Control Circuit
H-bridge Inverter Topology
Mosfet Switching Fault Detection
Charging Algorithm : Mosfet PWM based switch mode Charger Controller 5-amp/15-amp
2-step Charging Step-1: Boost Mode (led Flash)
Step-2: Absorption Mode (led On)
DC Fan initialization for Internal Cooling During Charging/inv Operation

Circuit Diagram:

PIC Codes can be viewed HERE

PCB details are provided HERE

The following explanation provides the details of the various circuit stages involved in the design:

In Inverter Mode

As soon as mains fails, the battery logic is detected at pin#22 of the IC which instantly prompts the controller section to switch the system in the inverter/battery mode.

In this mode the controller begins generating the required PWMs via its pin#13 (ccp out), however the PWM generation rate is implemented only after the controller confirms the logic level at pin#16 (INV/UPS switch).

If a high logic is detected at this pin (INV mode) the controller initiates a fully modulated duty cycle which is around 70%, and in case of a low logic at the indicated pinout of the IC, then the controller may be prompted to generate burst of PWMs ranging from 1% to 70% at a rate of 250mS period, which is termed as soft delay output while in the UPS mode.

The controller simultaneously with the PWMs also generates a "channel select" logic through pin#13 of the PIC which is further applied to pin#8 of the IC CD4081.

Throughout initial time period of the pulse (i.e 10ms) the pin12 of the PWM controller is rendered high such that the PWM can be obtained from pin10 of CD4081 exclusively and after 10mS, pin14 of controller is logic high and the PWM is accessible from pin11 of CD4081, as a result using this method a pair of anti-phased PWM becomes accessible to switch on the MOSFETs.


Aside from that a high logic (5V) becomes accessible from pin11 of the PWM controller, this pin turns high each time inverter is ON and ends up being low whenever inverter is OFF. This high logic is applied to pin10 of each the MOSFET drivers U1 and U2, (HI pin) to activate the high side MOSFETs of the two the mosfet banks.


For upgrading the proposed Sinewave UPS using PIC16F72, the following data may be used and implemented appropriately.



 The following data supplies the full transformer winding details:

Feedback from Mr. Hisham:

Hi mr swagatam ,how are you? 

I want to tell you that pure sine wave inverter using pic16f72 schematic have some mistakes,220uf bootstrap capcitor should be replaced with a (22uf or 47uf or 68uf),,,a 22uf capacitors which is connected between pin 1 and pin2 of the 2s ir2110 is wrong and should be removed, also a hex code called eletech. Hex should not be use cause its make inverter shutdown after 15 seconds with low battery led and buzer beeps, if you have big dc fan so the transistors should be replaced with a higher current,for mosfets safety a 7812 regulator is recommended to be connected to ir2110...also theres d14,d15 and d16 should not be connected to ground.

I have tested this inverter and its really pure sine wave,i have run a washing machine and its running silently without any noise, i have connected a 220nf capcitor in the ouput instead of 2.5uf, refrigerator is working too, i will share some pictures soon.
Best regards

 

  The schematic discussed in the above article was tested and modified with a few appropriate corrections by Mr. Hisham, as shown in the following images, viewers can refer to these for improving the performance of the same:

The IC PCF8883 is designed to work like a precision capacitive touch and proximity sensor switch through a unique (EDISEN patented) digital technology for sensing the minutest difference in the capacitance around its specified sensing plate.


The main features of this specialized capacitive touch and proximity sensor can be studies as given below:


 The following image shows the internal configuration of the IC PCF8883



The IC doesnt rely on the traditional dynamic capacitance mode of sensing rather detects the variation in the static capacitance by employing automatic correction through continuous auto-calibration.

The sensor is basically in the form of a small conductive foil which may be directly integrated with the relevant pinouts of the IC for the intended capacitive sensing or perhaps terminated to longer distances through coaxial cables for enabling accurate and effective remote capacitive touch sensing operations

The following figures represent the pinout details of the IC PCF8883. The detailed functioning of the various pinouts and the in-built circuitry may be understood with the following points:

A typical application configuration can be studied through this capacitive touch/proximity sensorcircuit design

The pinout IN which is supposed to be connected with the external capacitive sensing foil is linked with the ICs internal RC network.

The discharge time given by "tdch" of the RC network is compared by the discharge time of the second in-bult RC network denoted as "tdchimo".

The two RC networks go through periodic charging by VDD(INTREGD) through a couple of identical and synchronized switch networks, and subsequently discharged with the help of a resistor to Vss or the ground

The rate at which this charge discharge is executed is regulated by a sampling rate denoted by "fs".

In case if the potential difference is seen to be dropping below the internally set reference voltage VM, the corresponding output of the comparator tends to become low. The logic level which follows the comparators identifies the exact comparator that actually could switch before the other.

And if the upper comparator is identified to have fired first, this results with a pulse being rendered on CUP, whereas if the lower comparator is detected to have switched prior to the upper, then the pulse is enabled at CDN.


The above pulses engage in controlling the charge level over the external capacitor Ccpc associated with pin CPC. When a pulse is generated on CUP, the Ccpc is charged through VDDUNTREGD for a given period of time which triggers a rising potential on Ccpc.

Quite on the same lines, when a pulse is rendered at CDN, the Ccpc gets linked with current sink device to ground which discharges the capacitor causing its potential to collapse.

Whenever the capacitance at pin IN gets higher, it correspondingly increases the discharge time tdch, which causes the voltage across the relevant comparator to fall at a correspondingly longer time. When this takes place the output of the comparator tends to get low which in turn renders a pulse at CDN forcing the external capacitor CCP to discharge to some smaller degree.

This implies that CUP now generates the majority of the pulses which causes CCP to charge up even more without going through any further steps.

Inspite of this, the automatic voltage controlled calibration feature of the IC which relies on a sink current regulation "ism" associated with pin IN makes an effort to balance out the discharge time tdch by referring it with an internally set discharge time tdcmef.

The voltage across Ccpg is current controlled and becomes responsible for the discharge of the capacitance on IN rather rapidly whenever the potential across CCP is detected to be increasing. This perfectly balances the increasing capacitance on input pin IN.

This effect give rise to a closed loop tracking system which continuously monitors and engages into an automatic equalizing of the discharge time tdch with reference to tdchlmf.

This helps to correct sluggish variations in capacitance across IN pinout of the IC. During rapidly charging sates for example when a human finger is approached the sensing foil quickly, the discussed compensation might not transpire, in equilibrium conditions the length of the discharge period do not differ causing the pulse to alternately fluctuate across CUP and CDN.


This further implies that with larger Ccpg values a relatively restricted voltage variation for each pulse may be expected for CUP or CDN.

Therefore the internal current sink gives rise to a slower compensation, thereby enhancing the sensitivity of the sensor. On the contrary, when CCP experiences a decrease, causes the sensor sensitivity to go down.





An in-built counter stage monitors the sensor triggers and correspondingly counts the pulses across CUP or CDN, the counter gets reset each time the pulse direction across the CUP to CDN alternates or changes.
The output pin represented as OUT undergoes an activation only when adequate number of pulses across CUP or CDN  are detected. Modest levels of interference or slow interactions across the sensor or input capacitance does not produce any effect on the output triggering.


The chip makes note of several conditions such as unequal charge/discharge patterns so that a confirmed output switching is rendered and spurious detection are eliminated.


The IC includes an advanced start-up circuitry which enables the chip to reach equilibrium rather quickly as soon as the supply to it is switched ON.


Internally the pin OUT is configured as an open drain which initiates the pinout with a high logic (Vdd) with a maximum of 20mA current for an attached load. In case the output is subjected with loads over 30mA, the supply is instantly disconnected due to the short circuit protection feature which is instantly triggered.
This pinout is also CMOS compatible and therefore becomes appropriate for all CMOS based loads or circuit stages.

As mentioned earlier, the sampling rate parameter "fs" relates itself as 50% of the frequency employed with the RC timing network. The sampling rate can be set across a predetermined span by appropriately fixing the value of CCLIN.

An internally modulated oscillator frequency at 4% through a pseudo-random-signal inhibits any chance of interferences from surrounding AC frequencies.

The IC also features a useful "output state selection mode" which can be used for enabling the output pin to either in the monostable or bistable state in response to the capacitive sensing of the input pinout. Its rendered in the following manner:

Mode#1 (TYPE enabled at Vss): The output is rendered active for sp long as the input is held under the external capacitive influence.

Mode#2 (TYPE enabled at VDD/NTRESD): In this mode the output is alternately switched ON and OFF (high and low) in response to subsequent capacitive interaction across the sensor foil.

Mode#3 (CTYPE enabled between TYPE and VSS): With this condition the output pin is triggered (low) for some predetermined length of time in response to each capacitive touch inputs, whose duration is proportional to the value of CTYPE and can be varied with a rate of 2.5ms per nF capacitance.


A standard value for CTYPE for getting around a 10ms delay in mode#3 could be 4.7nF, and the maximum permissible value for CTYPE being 470nF, which may result in with a delay of about a second. Any abrupt capacitive interventions or influences during this period are simply ignored. 

Reference: PCF8883 data sheet

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