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Synchronizing Sine Wave PWM across the Inverters

A simple RMS matched PWM equivalent sinewave waveform generator can be made by using an IC 555 and IC 4060, as shown in the following figure.

This design can be then used for enabling the inverters to produce a sinewave equivalent waveform at their outputs, and across the connected mains line.

Each of these PWM processors would be required for each of the stackable inverter modules individually.






The different stages involved in the above PWM geneartor circuit can be understood with the help of the following point:

The IC 555 is configured as the basic PWM generator circuit. To be able to generate an adjustable PWM equivalent pulses at the desired RMS the IC requires fast triangle waves at its pin7 and a reference potential at its pin5 which determines the PWM level at its output pin#3

For generating the triangle waves, the IC 555 requires square waves at its pin#2, which is acquired from the IC 4060 oscillator chip.

The IC 4060 determines the frequency of the PWM, or simply the number of "pillars" in each of the AC half cycles.

The IC 4060 is mainly employed for multiplying the sample low frequency content from the inverter output into a relatively high frequency from its pin#7. The sample frequency basically makes sure that the PWM chopping is equal and synchronized for all the invetrer modules. This is main reason why the IC 4060 is included otherwise another IC 555 could have easy done the job, instead.

The reference potential at pin#5 of IC 555 is acquired from an opamp voltage follower shown at extreme left of the circuit.

As the name suggests this opamp delivers exactly the same magnitude of voltage at its pin#6 which appears at its pin#3....however the pin#6 replication of its pin#3 is nicely buffered, and therefore is richer than its pin3 quality, and thats the exact reason of including this stage in the design.

The 10 k preset associated at pin3 of this IC is used for adjusting the RMS level which ultimately fine tunes the the IC 555 output PWMs to the desired RMS level.

This RMS is then applied to the bases of the power devices in order to force them to work at the specified PWM RMS levels, which in turn causes the output AC to acquire a pure sinewave like attribute through a correct RMS level. This may be further enhanced by employing an LC filter across the output winding of the all the transformers.

The next and the final part of this 4kva stackable synchronized inverter circuit details the automatic load correction feature for enabling the inverters to deliver and maintain the correct amount wattage across the output power mains line in accordance with the varying loads switching.

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In this post we study the mosfet switching stage built for the proposed sinewave UPS circuit using PIC16F72.

Data provided by: Mr. hisham bahaa-aldeen (hisham2630@gmail.com)


Sinewave UPS Circuit using PIC16F72 Part-1
 
Sinewave UPS Circuit using PIC16F72 Part-3
 
Sinewave UPS Circuit using PIC16F72 Part-4

MOSFET Switching:

Check with MOSFET switching circuit diagram below:





In this case U1 (IR2110) and U2 (IR2110) high side / low side mosfet driver are employed, check with data sheet of this IC to understand more. In this the two MOSFET banks with high side and low side MOSFETs are intended for transformer’s primary side switching.

In this case we are discussing the functioning of bank (applying IC U1) only since the supplementary bank driving does not differ from from each other.


As soon as the inverter is ON the controller renders the pin10 of U1 is logic high which subsequently activates the high side MOSFETs (M1 - M4) ON, PWM for channel-1 from pin10 of CD4081 is applied to pin12 of the drver IC (U1) and likewise it is administered to the base of Q1 via R25.

While the PWM is logic high the pin12 of U1 is also logic high and triggers the low side MOSFETs of bank 1(M9 - M12), alternately it launches the transistor


Q1 which correspondingly renders the pin10 voltage of U1 logic low, thereupon turning OFF the high side MOSFETs (M1 - M4).


Therefore it implies that by default the high logic from pin11 of the microcontroller gets switched ON for the high side MOSFETs among the two the mosfet arrays, and while the associated PWM is high the low side MOSFETs are turned ON and the high side MOSFETs are switched OFF, and through this way the switching sequence keeps repeating.

Mosfet Switching Protection


Pin11 of U1 can be used for executing the hardware locking mechanism of each of the drivers units.

By standard fixed mode this pin may be seen fixed with a low logic, but whenever under any circumstance the low side MOFET switching fails to initiate (lets assume through o/p short circuit or erroneous pulse generation at the output), the VDS voltage of low side MOSFETs can be expected to shoot up which immediately causes the output pin1 of comparator (U4) to go high and become latched with the help of  D27, and render pin11 of U1 and U2 at high logic, and thereby toggle OFF the two the MOSFET driver stages effectively, preventing the MOSFETs from getting burnt and damaged.


Pin6 and pin9 is of +VCC of the IC (+5V), pin3 is of +12V for MOSFET gate drive supply, pin7 is the high side MOSFET gate drive, pin5 is the high side MOSFET receiving route, pin1 is the low side MOSFET drive, and pin2 is the low side MOSFET receiving path. pin13 is the ground of the IC (U1).

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